ED-Mon-P30 - Influence of the Atomic Layer Etching sequence on the electrical behavior of gate recessed AlGaN/GaN High Electron Mobility Transistors

4. Electronic devices
Christian Miersch1 , Sarah Seidel1, Alexander Schmid2, Johannes Heitmann3, Franziska C. Beyer1
1 Fraunhofer Institute of Integrated Systems & Device Technology IISB, Freiberg, Germany
2 Institute of Applied Physics, TU Bergakademie Freiberg, Freiberg (Germany)
3 Institute of Applied Physics, TU Bergakademie Freiberg, Freiberg (Germany); Fraunhofer Institute of Integrated Systems & Device Technology IISB, Freiberg, Germany

Abstract text
Lateral AlGaN/GaN HEMTs have a high potential due to the formation of a two-dimensional electron gas (2DEG) on the surface between the AlGaN and GaN. However, these devices are 'normally-on', which is unfavorable in electric circuits to avoid shortenings. One way to process a 'normally-off' or e-mode device is to recess etch below the gate, to bring the contact closer to the channel and shift the threshold voltage Vth to positive values [1]. This recess must be very precise and as damage free as possible since the partial recess depth has to be accurate in the nanometer range and the 2DEG is very sensitive to carrier scattering. Atomic layer etching (ALE) can provide both, a high controllability and low damage. The sequential two step etching consists of a Cl2 modification step, in which the Ga-N bonding energy is lowered and in a second removal step, where the weakened bonds will be cracked and removed by a gentle Ar plasma [2]. Ideally both steps are self-limiting and are separated by a purge step. Compared to continuous etching the process time is relatively long. Gradually reducing the need for purges and switching to continuous plasma operation effectivly shortens the cycle time and reduces the process costs and increases sustainability. Five modes were developed which all show low roughness and a constant Etch Per Cycle (EPC) of around 0.2 nm/cycle, but saving up to 88% of the process time. However, for the shortest ‘pulsed-bias’ mode the EPC was increased and Cl contaminations were visible [3]. Especially the influence of the plasma damage on the 2DEG can be studied by the electrical performance of the HEMTs. It could be shown, that the Vth can be shifted linearly with the etching depth, resulting in e-mode devices at 5 nm AlGaN barrier thickness below the gate contact. The influence of the gate leakage on the recess depth, as well as the saturation current will be discussed on transfer curves and out-put characteristics of the transistors for the five different modes.

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[2] C. Miersch et al; J. Vac. Sci. Technol. A 1 March 2024; 42 (2):22604. doi: 10.1116/6.0003350
[3] C. Miersch et al.; ‘On the way to more sustainability: development of Al0.25Ga0.75N ALE processes with reduced cycle time’, APL, submitted 31.01.2025